diff --git a/src/epd_driver/board/epd_board_v6.c b/src/epd_driver/board/epd_board_v6.c index d9fc8a81..d028a13d 100644 --- a/src/epd_driver/board/epd_board_v6.c +++ b/src/epd_driver/board/epd_board_v6.c @@ -201,7 +201,16 @@ static void epd_board_poweron(epd_ctrl_state_t *state) { // give the IC time to powerup and set lines vTaskDelay(1); + int tries = 0; while (!(pca9555_read_input(config_reg.port, 1) & CFG_PIN_PWRGOOD)) { + if (tries >= 500) { + ESP_LOGE("epdiy", "Power enable failed! INT status: 0x%X 0x%X", + tps_read_register(config_reg.port, TPS_REG_INT1), + tps_read_register(config_reg.port, TPS_REG_INT2) + ); + return; + } + tries++; vTaskDelay(1); } @@ -215,7 +224,6 @@ static void epd_board_poweron(epd_ctrl_state_t *state) { }; epd_board_set_ctrl(state, &mask); - int tries = 0; while (!((tps_read_register(config_reg.port, TPS_REG_PG) & 0xFA) == 0xFA)) { if (tries >= 500) { ESP_LOGE("epdiy", "Power enable failed! PG status: %X", tps_read_register(config_reg.port, TPS_REG_PG)); diff --git a/src/epd_driver/i2s_data_bus.c b/src/epd_driver/i2s_data_bus.c index 7e6eb4a5..302ee42b 100644 --- a/src/epd_driver/i2s_data_bus.c +++ b/src/epd_driver/i2s_data_bus.c @@ -49,9 +49,10 @@ static gpio_num_t start_pulse_pin; /// Initializes a DMA descriptor. static void fill_dma_desc(volatile lldesc_t *dmadesc, uint8_t *buf, - uint32_t epd_row_width) { - dmadesc->size = epd_row_width / 4; - dmadesc->length = epd_row_width / 4; + uint32_t buf_size, uint32_t buf_length) { + assert(buf_length % 4 == 0); // Must be word aligned + dmadesc->size = buf_size; + dmadesc->length = buf_length; dmadesc->buf = buf; dmadesc->eof = 1; dmadesc->sosf = 1; @@ -68,6 +69,13 @@ uint32_t dma_desc_addr() { 0x000FFFFF; } +// Helper function to help align values +static size_t align_up(size_t x, size_t a) +{ + return (size_t)(x + ((size_t)a - 1)) & ~(size_t)(a-1); +} + + /// Set up a GPIO as output and route it to a signal. static void gpio_setup_out(int gpio, int sig, bool invert) { if (gpio == -1) @@ -241,14 +249,15 @@ void i2s_bus_init(i2s_bus_config *cfg, uint32_t epd_row_width) { dev->timing.val = 0; // Allocate DMA descriptors - i2s_state.buf_a = heap_caps_malloc(epd_row_width / 4, MALLOC_CAP_DMA); - i2s_state.buf_b = heap_caps_malloc(epd_row_width / 4, MALLOC_CAP_DMA); + const size_t buf_size = align_up(epd_row_width/4, 4); // Buf size must be word aligned + i2s_state.buf_a = heap_caps_malloc(buf_size, MALLOC_CAP_DMA); + i2s_state.buf_b = heap_caps_malloc(buf_size, MALLOC_CAP_DMA); i2s_state.dma_desc_a = heap_caps_malloc(sizeof(lldesc_t), MALLOC_CAP_DMA); i2s_state.dma_desc_b = heap_caps_malloc(sizeof(lldesc_t), MALLOC_CAP_DMA); // and fill them - fill_dma_desc(i2s_state.dma_desc_a, i2s_state.buf_a, epd_row_width); - fill_dma_desc(i2s_state.dma_desc_b, i2s_state.buf_b, epd_row_width); + fill_dma_desc(i2s_state.dma_desc_a, i2s_state.buf_a, epd_row_width/4, buf_size); + fill_dma_desc(i2s_state.dma_desc_b, i2s_state.buf_b, epd_row_width/4, buf_size); // enable "done" interrupt SET_PERI_REG_BITS(I2S_INT_ENA_REG(1), I2S_OUT_DONE_INT_ENA_V, 1,