os/board/rtl8730e/src: implement recovery mechanism for PG flow using IWDG

[zhongnuo-tang]

1. implement IWDG in KM0, which is control using IPC by CA32
2. default timeout set for IWDG is 60s
3. IWDG ensures KM0 is working properly, KM0 and KM4 wakeup properly, AP power on properly. Once AP power on, watchdog in CA32 will resume counting and take over
4. Backup register will be used to record which core triggers the reset of IWDG during PG wakeup flow

[zhongnuo-tang]

Simulation of wakeup fail from PG
up_reboot_reason_get_hw_value: Reboot reason: IWDG reset, CA32 wakeup failed

up_reboot_reason_get_hw_value: Reboot reason: IWDG reset, KM4 wakeup failed

[zhongnuo-tang]

Implementation is as follows.

1. in rtl8730e_boot.c, IPC request will be sent to KM0 to enable IWDG, with timeout of 60s.
2. IWDG can remain enable or disable during PG. If it is enable during PG, it will trigger wakeup, which we do not want it as wakeup source, so in our implementation it will be disabled in PG state.
3. IWDG once enabled, cannot be disabled in active state. Refer to our usermanual, IWDG's clock source is a no-calibration clock, with a margin of error of 50%, so it will be refreshed every 30s in KM0 during active state to ensure no timeout.
4. During wakeup flow, once hardware PMC wakes LP (KM0), IWDG will resume its counter and start counting, if it successfully wake to KM0, KM0 will refresh IWDG every 30s.
5. KM0->KM4->CA32, so if KM4 is not able to be waken up or CA32's power is not able to power on during wakeup flow, it will enter a while loop, and prevent KM0 from refreshing the IWDG.
6. any of the three cases happen,(KM0 not wakeup, KM4 not wakeup, or CA32 not power on) it will cause KM0 not refreshing IWDG and reset happen after 60s.

I did not add CONFIG_PM macro to make it only enable for PM, because i think KM0 should have a watchdog to ensure it is running, if there is any issue with KM0, we should do reset too.