Code

Output Directory Changes#5

Code

Open

DaleDantis wants to merge 11 commits intoos-fpga:mainos-fpga/Virtual-FPGA-Lab:mainfrom DaleDantis:Out_Dir_ChangesDaleDantis/Virtual-FPGA-Lab:Out_Dir_ChangesCopy head branch name to clipboard

+17,178-114

Commits

Commits on Oct 22, 2021

• Shifted the run.sh file to main directory

  DaleDantis

  committed
  cdb1b96

  Copy full SHA for cdb1b96

• Merge branch 'main' of https://github.com/BalaDhinesh/Virtual-FPGA-Lab into Shell_Changes

  DaleDantis

  committed
  c04e896

  Copy full SHA for c04e896

• Updated Shell Script to work outside the fpga directory

  DaleDantis

  committed
  7dc8bc1

  Copy full SHA for 7dc8bc1

• Added .gitignore

  DaleDantis

  committed
  4ab9183

  Copy full SHA for 4ab9183

Commits on Oct 29, 2021

• Support for Artix-7 100T FPGA

  DaleDantis

  committed
  ddf5a4e

  Copy full SHA for ddf5a4e

• Streamlined the Output Filed Structure

  Show description for b7b8f3e
  DaleDantis

  committed
  b7b8f3e

  Copy full SHA for b7b8f3e

• Parameterized the Input Directory

  DaleDantis

  committed
  b875e0d

  Copy full SHA for b875e0d

• Changed the Output Directory from Examples folder to the Virtual-FPGA-Lab folder

  DaleDantis

  committed
  d22edfb

  Copy full SHA for d22edfb

• Changed Output Directory to make it more readable

  DaleDantis

  committed
  11d2f90

  Copy full SHA for 11d2f90

• Added support for Nexys A7

  DaleDantis

  committed
  a11d24d

  Copy full SHA for a11d24d

• Added Nexys Files. Removed Redundant Output Directories

  DaleDantis

  committed
  9f3ccad

  Copy full SHA for 9f3ccad